NVIDIA Collaborates with Cadence and Synopsys to Enhance EDA Workflows Using Vera CPU
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- NvidiaNews
NVIDIA is partnering with Cadence and Synopsys to optimize electronic design automation (EDA) applications for its Vera CPU. This initiative aims to enhance the design process for next-generation CPUs and GPUs, addressing the increasing complexity of chip design. By deploying Vera across EDA workflows, NVIDIA seeks to accelerate chip production and improve the pace of technological advancements in the industry.
The collaboration is significant as it focuses on boosting EDA workloads, which are crucial for semiconductor development. With the Vera CPU architecture, NVIDIA aims to enhance performance in logic simulation, formal verification, and digital implementation, which are vital for validating chip designs. The ability to accelerate these processes can lead to faster product development and a more efficient design cycle.
Early testing results indicate that Vera can significantly improve performance in critical EDA applications, with Cadence Jasper and Synopsys VCS showing up to 1.5x higher performance on selected workloads. NVIDIA's ongoing work with these companies on application profiling and system-level tuning suggests a commitment to enhancing engineering productivity across various workflows in the future. No further timeline was disclosed at the time of publication.
Original report
NVIDIA Harnesses Vera CPU to Speed Up Design of Next-Generation CPUs and GPUs
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