Waymo has disclosed new technical specifications of its onboard computing system that powers its autonomous driving technology. This system features a custom-built 5 nm ASIC that delivers over 1,000 TOPS of machine learning performance, designed to operate under challenging conditions encountered by its autonomous vehicles.
The significance of this development lies in its ability to provide millisecond-level response times, which are crucial for the Waymo Driver's complete driving task. Unlike traditional driver-assistance systems, the Waymo Driver operates independently, necessitating a robust computing architecture that ensures low latency, reliability, and redundancy based on insights from over 200 million miles of autonomous driving.
Looking ahead, Waymo has scaled its computing power by 20 times in the last eight years, focusing on ultra-low latency to enhance responsiveness in complex environments. The company emphasizes the importance of reducing “pixels-to-actuation” latency to achieve fast decision-making capabilities, which will be critical as it expands its commercial robotaxi operations.
Editor's Note
Waymo's advancements in onboard computing systems highlight the increasing importance of robust technology in autonomous vehicle operations. As companies like Waymo push the boundaries of fully autonomous driving, the demand for high-performance computing solutions will continue to grow. This trend is pivotal for the future of urban mobility and the competitive landscape of the autonomous vehicle market.
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